VLSI Design 2010 VLSI Design 2010
VLSI Design 2010 VLSI Design 2010
Submissions  |  Registration  |  Conference Agenda  |  Sponsorship Opportunities  |  Location/Travel  |  Team Members  |  Contact Us
Conference Program
Keynote speakers
Conference Tutorials
Call for Participation
Education Forum
Industry Forum
  Conference Tutorials
Home
2010 VLSI ConferenceTutorial Program
Schedule
Sunday, 3 Jan 2010
Time Session T1 Session T2 Session T3 Session T4
9AM - 5PM Green at the Micro Scale: Design and Management of Energy Harvesting Wireless Embedded Systems

Vijay Raghunathan, Purdue University
New Generation Integrated Multi-Core Modeling in Microprocessor Design

Pradip Bose, IBM

Vaidyanathan Srinivasan, IBM

Viji Srinivasan, IBM

Sriram Vajapeyam, IBM
Design- process optimization challenges at the Bleeding Edge (or Why can’t I design what I want in 22nm technology? )

James Oberschmidt, IBM

Josef Watts, IBM

Suresh Purayat, IBM

J. Andres Torres, Mentor Graphics
High-Quality and Low-Cost Delay Testing for Nanoscale CMOS Technologies

Krishnendu Chakrabarty,
Duke University

Mohammad Tehranipoor,
University of Connecticut
  Venue: NIMHANS Venue: NIMHANS Venue: NIMHANS Venue: NIMHANS
 
Home | Call for Participation | Registration | Conference Program
Sponsorship Opportunities | Location | Team Members| Contact Us | Site Map
The logos and trademarks used on this site are the property of their respective owners
[email protected]
VLSI Design conference
Web Hosting and Design by IBEE