Photo Gallery VLSI 2009!                                         Photo Gallery VLSI 2009!                                         Photo Gallery VLSI 2009!                                        

 

Industry Forum

IF PROGRAM DURATION

5th December
1135 - 1305 = 90 min
1515-1645 = 90min
1705-1835 = 90 min

6th December
1035-1205 = 90 min
1415-1545 = 90 min
1605-1735 = 90 min

Total time for IF = 540 min
Actual Time for program = 450 min

Distribution plan

Sponsorship

 Number

# of slots per
sponsor

Individual slot
duration (min)

Total time (min)

Platinum

2

2

30

120

Gold

4

2

20

160

Silver

3

2

15

90

Bronze

4

1

15

60

Total

 

 

 

430

 

Company

Sponsorship

Date

Schedule
Duration

Speaker

Topic

Comments

THEME: SILICON, ASSP

 

 

 

 

 

LSI Logic

Platinum

January 5, Mon.

1140 - 1210

 

 

 

ST

Gold

January 5, Mon

1215 - 1235

 

 

 

Intel

Gold

January 5, Mon

1240 - 1300

 

 

 

 

 

 

 

 

 

 

THEME: EDA

 

 

 

 

 

 

Synopsys

Platinum

January 5, Mon

1520 - 1550

Jai Durgam

 

"Jai Durgam is a Senior Director,
Applications Consulting at Synopsys.
Jai has been with Synopsys since July
2005. Jai has over 20 years of
experience in the semiconductor
industry. Prior to joining Synopsys, he
was VP of Silicon Engineering at a
Scintera Networks, a Silicon Valley
startup where he had the overall
responsibility for Scintera’s product
development. Jai spent a few years at
Silicon Image where he helped build
the company’s successful IP business.
Prior to that, Jai spent 10 years at
National Semiconductor in Santa Clara
first in the Corporate CAD group and
later in the Local Area Networks
division. Jai has a Masters Degree
from the Oregon State University."

Magma

Silver

January 5, Mon

1555 - 1610

 

 

 

Mentor

Gold

January 5, Mon

1615 - 1635

 

 

 

VSI

 

 

1640 - 1655

 

 

 

 

 

 

 

 

 

 

THEME: EDA, ASSP, IMPLEMENTATION

 

 

 

 

Cadence

Silver

January 5, Mon

1710 - 1725

Amrik Singh Virdi

 

 

Attrenta

Bronze

January 5, Mon

1730 - 1745

 

Early Design Closure
Solutions from Atrenta

 

Qualcomm

Gold

January 5, Mon

1750 - 1810

 

 

 

ARM

Silver

January 5, Mon

1815 - 1830

 

 

 

 

 

 

 

 

 

 

THEME: ASSP

 

 

 

 

 

 

Intel

Gold

January 6, Tue

1040 - 1100

 

 

 

Qualcomm

Gold

January 6, Tue

1105 - 1125

Sanjeev R.Nimisha

"Audio Features for Enchanced Mobile Phone User Experience"

 

TI

Bronze

January 6, Tue

1130 - 1145

Rubin Parekhji

"Semiconductor
technologies for a safer,
healthier, geener, and a
more enjoyable world."

He is a senior member, technical staff
in TI and has been with TI for over 12
years. He is a well-known expert in
VLSI Test/DFT. He has a Ph.D. from IIT
Bombay. He has published extensively
in the area of VLSI test and is on the
editorial board of JETTA published by
Springer.

Broadcom

Bronze

January 6, Tue

1150 - 1205

Rajiv Kapur

 

 

 

 

 

 

 

 

 

THEME: EDA, IP

 

 

 

 

 

Synopysys

Platinum

January 6, Tue

1420 - 1450

Dr. Seetharaman

 

 

Mentor

Gold

January 6, Tue

1455 - 1515

 

 

 

Magma

Silver

January 6, Tue

1520 - 1535

 

 

 

Cadence

Silver

January 6, Tue

1540 -1555

Irshad Alam

 

 

 

 

 

 

 

 

 

THEME: IMPLEMENTATION

 

 

 

 

 

ARM

Silver

January 6, Tue

1610 - 1625

 

 

 

ST

Gold

January 6, Tue

1630 - 1650

 

 

 

Connexant

Broanze

January 6, Tue

1655 - 1710

 

 

 

LSI

Platinum

January 6, Tue

1715 - 1745

 

 

 

   
 
 


VLSI Society of India (VSI)


IEEE Circuits and System Society


IEEE Solid-State Circuits Society


Sister Conference --- DAC

 
 
 

Copyright © VLSiDESigN, All Rights Reserved Worldwide
Designed & maintained by DOERS