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This joint-conference is a forum for
researchers and designers to present and
discuss various aspects of VLSI design,
electronic design automation, enabling
technologies, and embedded systems. It covers
the entire spectrum of activities in the two
vital areas of VLSI and embedded systems,
which underpin the semiconductor industry. The
five-day program will consist of regular paper
sessions, special sessions, embedded
tutorials, panel discussions, design contest,
industrial exhibits and two days of tutorials.
TOPICS OF INTEREST:
Papers are invited on topics related to, but
not limited to, the following areas:
VLSI -
Giga-scale design methodology,
processor and memory design, analog-digital-RF
mixed signal SoC, concurrent interconnect,
package and board design, low-power design,
asynchronous design, physical design, impact
of process technology on design, defect
tolerant architectures, synthesis, test and
DFT, formal verification, mixed signal-mixed
domain CAD, Issues in nano-CMOS technologies,
non-classical CMOS, non-CMOS devices, phase
change memory, technology
modeling-design-simulation, giga-scale
integrated circuit manufacturing, reliability,
MEMS, CMOS sensors, CAD/EDA methodologies for
nanotechnology design flows.
Embedded Systems - Embedded system
hardware/software co-design, reconfigurable
hardware design, FPGA/ASIC-based design, DSP,
communications, encryption, security,
compression, digital imaging, hybrid
systems-on-chip, sensor networks, programmable
devices, hardware-software co-design and
co-verification
PAPER SUBMISSION: Please submit previously
unpublished papers electronically on the
conference website by July 17, 2008. The
manuscript should clearly state the novel
ideas, results and applications of the
contribution. Submissions will undergo a
double blind review. On the web site, please
provide the abstract of the paper and contact
details of the authors. Papers must not exceed
6 single-spaced pages including figures and
references in two-column IEEE conference paper
format. Papers exceeding the 6-page limit or
identifying the authors will be rejected
without review. Proposals for embedded
tutorials in emerging areas should be
submitted as an extended abstract not
exceeding 4 pages. Authors will be notified of
acceptance by September 26, 2008. Please
submit Camera-ready versions by October 24,
2008.
TUTORIALS: This joint conference has a history
of running a highly successful series of
tutorials. Two days will be dedicated to
full-day tutorials on recent topics in VLSI
design, EDA, VLSI technology and embedded
systems. Tutorial proposals should be
submitted through the conference website by
July 17, 2008.
BEST PAPER AWARDS: Prof. A. K. Choudhury Best
Paper Award, Prof. N. N. Biswas Best Student
Paper Award, Honorable Mention Awards and
Design Contest Awards will be given. Papers
with at least one student author are eligible
for the Best Student Paper Award.
EXHIBITS: The conference provides a unique
opportunity for vendors of VLSI design tools
and services to display their
products/services. Please immediately contact
the Exhibits Chairs for details.
FELLOWSHIPS: The Fellowship committee will
award fellowships, based on need and merit, to
partially cover expenses of attendees from
India. Applications must be submitted by
October 24, 2008, through the conference
website.
CONTESTS: Entries are invited for two contests
- the Student Design Contest and, for the
first time, an EDA Software Contest to be
organised at the conference. Please refer to
the conference web site for rules.
IMPORTANT DATES:
Paper/Tutorial/Contest submission :
July 17, 2008
Acceptance notification : September 26,
2008
Camera ready paper due : October 24,
2008
Last Updated 01 May 2008 |
