Technology Impacts on Sub-90nm CMOS Circuits Design and Design Methodologies

Speakers: Ruchir Puri, Tanay Karnik,
Rajiv Joshi

Interconnect Process Variations Theory and Practice

Speakers:
N.S. Nagaraj

4460: Embedded Tutorial: Analog Circuit Performance Issues with Aggressively Scaled Gate Oxide CMOS Technologies

K. Narasimhulu and
V. Ramgopal Rao

4279: Modeling and Reduction of Gate Leakage during Behavioral Synthesis of NanoCMOS Circuits

Saraju P. Mohanty and Elias Kougianos

4272: A 3Gb/s/Wire Global On-Chip Bus with Near Velocity-of-Light Latency

Peter Caputa and Christer Svensson

4266: A New Device Level Digital Simulator for Simulation and Functional Verification of Large Semiconductor Memories

Tathagato Rai Dastidar and Partha Ray

4341: Extrinsic Analog Synthesis Using Piecewise Linear Current-Mode Circuits

M. S. Bhat, Rekha S. and H. S. Jamadagni

4548: Gate-induced Barrier Field Effect Transistor (GBFET) A New Thin Film Transistor for Active Matrix Liquid Crystal Display Systems

M. Jagadesh Kumar and A. Orouji

4280: Optimization of Global Interconnects in High Performance VLSI Circuits

Min Tang and Jun-Fa Mao

4419: An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip*

Hari V. Venkatanarayanan and Michael L. Bushnell

4516: Design of a 1 V Low Power 900 MHz QVCO

Prabir Kumar Saha, Asudeb Dutta, Tarun Kanti Bhattacharyya and Amit Patra

4540: Wide Limited Switch Dynamic Logic Circuit Implementations

Jayakumaran Sivagnaname, Hung C. Ngo, Kevin J. Nowka, Robert K. Montoye and Richard B. Brown

4298: A Statistical Method for Fast and Accurate Capacitance Extraction in the Presence of Floating Dummy Metals*

Shabbir Batterywala, Rohit A., Yansheng Luo and Alex Gyure

4329: Test Cost Reduction Using Partitioned Grid Random Access Scan

Dong Hyun Baik and Kewal K. Saluja

4243: 16-bit Segmented Type Current Steering DAC for Video Applications

Gaurav Raja and Basabi Bhaumik

4592: A Stimulus-Free Probabilistic Model for Single-Event-Upset Sensitivity*

Thara Rejimon and Sanjukta Bhanja

4323: MoM - A Process Variation Aware Statistical Capacitance Extractor

Rohit A. and Shabbir Batterywala

4557: An Efficient Scan Tree Design for Compact Test Pattern Sets

Shibaji Banerjee, Dipanwita Roy Chowdhury and Bhargab B. Bhattacharya

4606: A Low Power 1.8 V 4-Bit 400-MHz Flash ADC in 0.18um Digital CMOS

Daibashish Gangopadhyay, T. K. Bhattacharyya and Subhadeep Banik

4368: Phase Change Memory Disturbs and Faults

Mohammad Gh. Mohammad, Muna Al-Basman and Laila Terkawi

4473: Parasitic Aware Routing Methodology Based on Higher Order RLCK Moment Metrics*

Amitava Bhaduri and Ranga Vemuri

4524: On Methods to Improve Location Based Logic Diagnosis

Wei Zou, Wu-Tung Cheng, Sudhakar M. Reddy and Huaxing Tang

4564: A Low Power 6-Bit A/D Converter Achieving 10-Bit Resolution for MEMS Sensor Interface Using Time-Interleaved Delta Modulation

Koushik De and S. Kal

4491: Dynamic Tree Reconstruction with Application to Timing-Constrained Congestion-Driven Global Routing

Jin-Tai Yan, Chia-Fang Lee and Yen-Hsiang Chen

4463: Evaluation of Non-Quasi-Static Effects during SEU in Deep-Submicron MOS Devices and Circuits*

Palkesh Jain, D. V. Kumar, J. M. Vasi, and M. B. Patil

4594: A Wide-Range, High-Resolution, Compact CMOS Time to Digital Converter

V. Ramakrishnan and Poras T.Balsara

4520: Checking Nested Properties Using Bounded Model Checking and Sequential ATPG

Qiang Qiang, Daniel G. Saab and Jacob A. Abraham

4338: CAD Tools for a Globally Asynchronous Locally Synchronous FPGA Architecture

Xin Jia and Ranga Vemuri

4319: Active Crosstalk Cancel for High-Density Inductive Inter-Chip Wireless Communication

Amit Kumar, Noriyuki Miura, Muhammad Muqsith and Tadahiro Kuroda

4518: Programmable LDPC Decoder Based on the Bubble-Sort Algorithm

Rohit Singhal, Gwan S. Choi and Rabi Mahapatra

4301: Apriori Formal Coverage Analysis for Protocol Properties

Praveen Tiwari, Saptarshi Biswas and Raj S Mitra

4517: Heterogeneous Floorplanning for FPGAs

Yan Feng and Dinesh Mehta

4588: A Comprehensive Solution for True Hierarchical Timing and Crosstalk Delay Signoff

K. Rajagopal,
R. Sivakumar,
N. Arvind, C. Sreeram, V. Visvanathan,
S. Shuri, P. Fortner,
R. Chander, S. Sripada and Q. Wu

4453: An Asynchronous Interconnect Architecture for Device Security Enhancement

Simon Hollis and Simon W. Moore

4402: An Integrated Approach for Combining BDD and SAT Provers

Rolf Drechsler, G. Schwin Fey and Sebastian Kinder

4597: A Novel Architecture Using the Decorrelating Transform for Low-Power Adaptive Filters

M. P. Tennant, A. T. Erdogan, T. Arslan and J. Thompson

4400: A Linear Time Algorithm for Wire Sizing with Simultaneous Optimization of Interconnect Delay and Crosstalk Noise*

Narender Hanchate and N. Ranganathan

4567: A Pipelined Switched-Current Chaotic System for the High-speed Truly Random Number Generation in Crypto Processor

Zhou Tong, Yu Ming-yan and Ye Yi-zheng

4640: Reducing Design Verification Cycle Time through Testbench Redundancy

A. Kokrady, R. Mehrotra, T. Powell and S. Ramakrishnan

4462: Instruction-Set-Extension Exploration Using Decomposable Heuristic Search

Samik Das, Partha P. Chakrabarti and Pallab Dasgupta

4493: An On-Chip Voltage Regulator with Improved Load Regulation and Light Load Power Efficiency

R. G. Raghavendra and P. Mandal

4307: An Approach to Architectural Enhancement for Embedded Speech Applications

Soumyajit Dey, Susmit Biswas, Arijit Mukhopadhyay and Anupam Basu

4308: Sequential Spectral ATPG Using the Wavelet Transform and Compaction

Suresh Kumar Devanathan and Michael L. Bushnell

4632: Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors

Nachiketh Potlapally, Srivaths Ravi, Anand Raghunathan, Ruby Lee and Niraj Jha

4478: Efficient Design and Analysis of Robust Power Distribution Meshes

Puneet Gupta and Andrew B. Kahng

4434: A Low Power ROM-less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator

Jun Chen, Rong Luo, Huazhong Yang and Hui Wang

4422: Automatic Path-Delay Fault Test Generation for Combined Resistive Vias, Resistive Bridges, and Capacitive Crosstalk Delay Faults

Shweta Chary and M. L. Bushnell

4498: Handling Constraints in Multi-Objective GA for Embedded System Design

Ting Chen, Tulika Mitra, Abhik Roychoudhury and Biman Chakraborty

4504: Test Pattern Generation for Power Supply Droop Faults

Debasis Mitra, Subhasis Bhattacharjee, Susmita Sur-Kolay, Bhargab B. Bhattacharya,
Sujit T Zachariah and Sandip Kundu

4521: Performance Optimization with Scalable Reconfigurable Computing Systems

Rama Sangireddy, Prabhu Rajamani and Shwetha Gaddam

4470: New Procedures to Identify Redundant Stuck-at Faults and Removal of Redundant Logic

Gang Chen, Sudhakar Reddy, Irith Pomeranz and Janusz Rajski

4409: A New Approach to Synthesize Multiple-Output Functions Using Reversible Programmable Logic Array

Ahsan Raja Chowdhury, Rumana Nazmul and Hafiz Md. Hasan Babu

4622: Bounding Supply Noise Induced Path Delay Variation Using a Relaxation Approach

Baohua Wang, Pinaki Mazumder

4590: Novel BCD Adders and their Reversible Logic Implementation for IEEE 754r Format

Himanshu Thapliyal, Saurabh Kotiyal and M. B. Srinivas

4676: On the Size and Generation of Minimal N-Detection Tests

Kalyana R. Kantipudi and Vishwani D. Agrawal

4583: State Encoding of Finite-State Machines Targeting Threshold and Majority Logic Based Implementations with Application to Nanotechnologies

Rui Zhang and Niraj K. Jha

4648: Accurate Substrate Noise Analysis Based on Library Module Characterization

Subodh M. Reddy and Rajeev Murgai

4547: An Efficient and Accurate Logarithmic Multiplier Based on Operand Decomposition

V. Mahalingam and N. Ranganathan

4627: Improving the Performance of Automatic Sequential Test Generation by Targeting Hard-to-Test Faults

Loganathan Lingappan and Niraj K. Jha

4615: Gate Delay Modeling with Multiple Input Switching for Static (Statistical) Timing Analysis

Jayashree Sridharan and Tom Chen

4702: Efficient Techniques for Noise Characterization of Sequential cells and Macros

Venkat Rao Vallapaneni, Ravi. Shankar Chevuri, Xu Bingxiong, Ye Lun and Chakraborty Kanad

4406: Partial Product Reduction Based on Look-Up Tables

H. Mora, J. Pascual,
J. Romero and F. Lopez

4646: Low-Cost Production Testing of Wireless Transmitters

Achintya Halder and Abhijit Chatterjee

4556: Design of Heterogeneous Embedded Systems Using DFCharts Model of Computation

I. Radojevic
Z. Salcic and
P. Roop

4288: Performance Measurement and Improvement of Asymmetric Three-Tr. Cell (ATC) DRAM toward 0.3V Memory Array Operation

Motoi Ichihashi and Haruki Toda

4359: Optimized VLIW Architecture for Non-zero IF QAM-Modem Implementations

Alok Kumar Pani and
R. Kumar

4551: Design Planning for Uniform Thermal Distribution

Rajendra M. Patrikar and O. Peyran

4614: Dynamic Template Generation for Resource Sharing in Control and Data Flow Graphs

David Zaretsky, Gaurav Mittal, Robert Dick and Prith Banerjee

4638: A Low-Power Asymmetric Source Driver Level Converter Based Current-Mode Signaling Scheme for Global Interconnects
Ashok Narasimhan, Bhooma

Srinivasaraghavan and Ramalingam Sridhar

4589: Ultra Folded High-Speed Architectures for Reed-Solomon Decoders

Kavish Seth, Viswajith, S. Srinivasan and V. Kamakoti

4350: Solving Thermal Problems of Hot Chips Using Voronoi Diagrams

Subhashis Majumder and Bhargab B. Bhattacharya

4515: Recovery-based Real-Time Static Scheduling for Battery Life Optimization

Anirban Lahiri, Saurabh Agarwal, Anupam Basu and Bhargab Bhattacharya

4371: A Low Leakage and SNM Free SRAM Cell Design in Deep Submicron CMOS Technology

Sanjeev Kumar Jain and Pankaj Agarwal

4508: A Wideband Frequency-Shift Keying Demodulator for Wireless Neural Stimulation Microsystems

Mian Dong,Chun Zhang, Songping Mai, Zhihua Wang and Dongmei Li

4382: Design of Multi-Bit SET Adder and its Fault Simulation

Deepanjan Datta and Samiran Ganguly

4619: Hybrid Custom Instruction and Co-Processor Synthesis Methodology for Extensible Processors

Fei Sun, Anand Raghunathan, Srivaths Ravi and Niraj K. Jha

4542: SEAT-LA: A Soft Error Analysis Tool for Combinational Logic

R Rajaraman, J. S. Kim, N. Vijaykrishnan, Y. Xie and M. J. Irwin

4361: Improved Data Compression for Serial Interconnected Network on Chip through Unused Significant Bit Removal

Simon Ogg and Bashir M. Al-Hashimi

4720: Efficient Analog Performance Macromodeling via Sequential Design Space Decomposition

Mengmeng Ding and R. Vemuri

4477: An Automatic Code Generation Tool for Partitioned Software in Distributed Systems

Viswanath Sairaman, N. Ranganathan and Neeta S. Singh

4377: Exceptional ASIC: Through Automatic Timing Exception Generation (ATEG)

Sivaprasad Embanath and Ramakrishnan V.

4514: Novel Architecture of EBC for JPEG2000

Anand Gautam, K. Pratyush Aditya, A. Geeta Madhuri, Priya Khandelwal, Meghana Desai, Malvika Dutt, Krishna Padma N. and Reeti Bhatia

4492: A Single Supply Level Shifter for Multi-Voltage Systems

Qadeer A. Khan, Sanjay K. Wadhwa and Kulbhushan Misri

4278: A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm

Naga M. Kosaraju, Murali Varanasi and Saraju P. Mohanty

4591: An Area and Configuration-Bit Optimized CLB Architecture and Timing-Driven Packing for FPGAs

Vikram Chandrasekhar, Vivek Garg, Sashikanth and V. Kamakoti

4624: Real Time Dynamic Receive Apodization for an Ultrasound Imaging System

Joydeep Bhattacharyya, Pralay Mandal, Ritoban Banerjee and Swapna Banerjee

Design Contest Presentations

Sanyog: An Iconic Communication Aid for Children Suffering
from Cerebral Palsy and Motor Neuron Disorders

Arijit Mukhopadhyay, Soumyajit Dey, Pawan Saraswat,
Susmit Biswas, Vijay Srinivas Nori, Samit Bhattacharya, Anupam Basu

Implementation of a Wide-Range, High-Resolution, Compact Time to
Digital Converter in 0.5m CMOS technology

4369: A Rail-to-Rail I/O Op-amp with 0.5% gm Fluctuation Using Double p-Channel Differential Input Pairs

Z. Li, B. Zhong, M. Yu, Y. Ye and J. Ma

4600: Using Level Restoring Method for Dual Supply Voltage Circuits

Mohammad Emadi, Farzan Farbiz and Khosro Haj Sadeghi

4310: Embedded Tutorial: Transaction Level Modeling: New Era in SoC Design

Syed Saif Abrar

4533: Circuit Compatible Macromodeling of High-Speed VLSI Modules Characterized by Scattering Parameters

D. Saraswat, R. Achar and M. Nakhla

4529: High Speed Robust Current Sense Amplifier for Nanoscale Memories -- A Winner Take All Approach

Srikanth Sundaram, Praveen Elakkumanan and Ramalingam Sridhar

4569: Statistical Estimation of Correlated Leakage Power Variation and Its Application to Leakage-Aware Design

Maryam Ashouei and Abhijit Chatterjee,
Adit D. Singh, Vivek De and
T. M. Mak

4435: A Novel Fuzzy Approach for Providing QoS Control in Limited Energy Real-Time Systems

Shampa Chakraverty,
Kshitij Sanghi and Kanishk Jain

4602: Efficient and Accurate EMC Analysis of High-Frequency VLSI Subnetworks

G. Shinh, R. Achar,
N. Nakhla,
M. Nakhla and I. Erdin

4364: ADC Precision Requirement for Digital Ultra-Wideband Receivers with Sublinear Front-ends: A Power and Performance Perspective*

Ivan Siu-Chuang Lu, Neil Weste and Parameswaran

4444: On the Implementation of a Low-Power IEEE 802.11a Compliant Viterbi Decoder

Koushik Maharatna, Alfonso Troya, Milos Krstic and Eckhard Grass

4642: Using Shiftable Content Addressable Memories to Double Memory Capacity on Embedded Systems

Haris Lekatsas, Joerg Henkel, Venkata Jakkula and Srimat Chakradhar

4416: Frame Based Fair Multiprocessor Scheduler: A Fast Fair Algorithm for Real-time Embedded Systems

Arnab Sarkar, P. P. Chakrabarti and Rajeev Kumar

4503: Techniques for On-chip Process Voltage and Variation Detection and Compensation of Temperature

Qadeer A. Khan, G. K. Siddhartha, Divya Tripathi, Sanjay K. Wadhwa and Kulbhushan Misri

4425: A Wide-band Lumped Element Compact CAD Model of Si-Based Planar Spiral Inductor for RFIC Design

S. Mandal, A. De,
A. Patra and S. Sural

4458: Reinforcement Temporal Difference Learning Scheme for Dynamic Power Management in Embedded Systems

Viswanathan Lakshmi Prabha and Elwin Chndra Monie

4412: Improving the Performance of CAD Optimization Algorithms Using On-line Meta-level Control

Sandip Aine, P. P. Chakrabarti and Rajeev Kumar

4572: Design of Low-Voltage Low-Power Continuous-Time Filter for Hearing aid Application Using CMOS Current Conveyor Based Translinear Loop

Debashis Dutta, Ritesh Ujjwal and Swapna Banerjee

4660: Generating Scalable Polynomial Models: Key to Low Power High Performance Designs

Girishankar G. and Shitanshu Tiwari

4647: Performance and Energy Benefits of Instruction Set Extensions in an FPGA Soft Core*

Partha Biswas, Sudarshan Banerjee, Nikil Dutt, Laura Pozzi and Paolo Ienne

4659: Symbolic Time-Domain Behavioral and Performance Modeling of Linear Analog Circuits using an Efficient Symbolic Newton-Iteration Algorithm for Pole Extraction

Ritochit Chakraborty, Mukesh Ranjan and Ranga R. Vemuri

4639: An 8-bit, 3.8 GHz Dynamic BiCMOS Comparator for High-Performance ADC

Sanjoy Kumar Dey and Swapna Banerjee

4669: Zero Steady State Current Power on Reset Circuit with Brown Out Detector

Sanjay Kumar Wadhwa, G. K. Siddhartha and Gaurav Anand

4616: A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks

Thomas Daniel Richardson, Chrysostomos A. Nicopoulos, Dongkook Park, Vijaykrishnan N., Yuan Xie and Chita R. Das

4536: Fast DC Analysis and its Application to Combinatorial Optimization Problems

Gaurav Trivedi, Madhav P. Desai and H. Narayanan

4322: Threshold Trimming Based Design of a CMOS Programmable Operational Amplifier

Roopak Suri and C. M. Markan

4570: Semi-Custom Design of Adiabatic Adder Circuits

V. S. Kanchana Bhaaskaran, Daniel Sudhakar Emmanuel and S. Salivahanan

4306: Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing

Ajay Joshi, Vinita Deodhar and Jeffrey Davis

4309: Aliasing Analysis of Spectral Statistical Response Compaction Techniques

Omar I. Khan and Michael L. Bushnell

4507: Development of a Wireless Integrated Toxic and Explosive MEMS Based Gas Sensor

Tarun Kanti Bhattacharyya, Shreyas Sen, Debashis Mandal and S. Lahiri

4326: Clockless Pipelining for Coarse Grain Datapaths

Abdelhalim Alsharqawi and Abdel Ejnioui

4617: A Progressive Two-Stage Global Routing for Macro-Cell Based Designs

Cengiz Alkan and Tom Chen

4318: Testing High-Speed IO Links Using On-Die Circuitry

Priya A Iyer, Shailendra Jain, Bryan Casper and Jason Howard

4568: Custom Reconfigurable Architecture for Autonomous Fault-Recovery of MEMS Vibratory Sensor Electronics

Evangelos
F. Stefatos, Tughrul Arslan, Didier Keymeulen, and Ian Ferguson

4392: Exploring Logic Block Granularity in Leakage Tolerant FPGA

Rajan Konar, Rajarshee Bharadwaj, Dinesh Bhatia and Poras Balsara

4451: Deterministic Low-latency Data Transfer across Non-integral Ratio Clock Domains

Suresh Balasubramanian, N. Nataragjan, Olivier Franza and
Chris Gianos

4330: PIDISC: Pattern Independent Design Independent Seed Compression

Kedarnath J. Balakrishnan, Seongmoon Wang and Srimat Chakradhar

4653: Efficient DNA Sensing with Fabricated Silicon Nanopores: Diagnosis Methodology and Algorithms

Soumendu Bhattacharya,
V. Natarajan, Sankar Nair and Abhijit Chatterjee

4526: High Performance MTCMOS Technique for Leakage Reduction in Hybrid SOI-Epitaxial Technologies with Enhanced-Mobility PFET Header

Koushik K. Das, Shih-Hsien Lo and Ching-Te Chuang

4635: SmartExtract: Accurate Capacitance Extraction for SOC Designs

U. Narasimha, A. Hill and N. S. Nagaraj

4388: Analog Macromodeling for Combined Resistive Vias, Resistive Bridges, and Capacitive Crosstalk Delay Faults

Shweta Chary and Michael L. Bushnell

4612: Area and Power Efficient VLSI Architecture for Computing Pseudo Inverse of Channel Matrix in a MIMO Wireless System

Zahid Khan, Tughrul Arslan, John S. Thompson and Ahmet T. Erdogan

4546: An Alternative Real-Time Filter Scheme to Block Buffering

Yen-Jen Chang

4510: Linear Required-Arrival-Time Trees and their Construction

Parthasarathi Dasgupta and Prashant Yadav

4495: An On-Chip Diagnosis Methodology for Embedded Cores with Replaceable Modules

Ramesh Tekumalla

4348: CMOS IC for Sensor Applications

Supriya S. Shanbhag

4289: Leakage Power Reduction in Dual-Vdd and Dual-Vth Designs by Probabilistic Analysis of Vth Variation

Aswath Oruganti and Nagarajan Ranganathan

4313: A Methodology for Switching Activity Based IO Power Pad Optimisation

Snehashis Roy, Jairam S. and Udayakumar H.

4245: The Cut Delay Fault Model for Guiding the Generation of n-Detection Test Sets for Transition Faults

Irith Pomeranz and Sudhakar M. Reddy